Name
Abstract | ||
|---|---|---|
We introduce a simple hierarchical design technique for using dynamic domino circuits to build high-performance self-timed data path circuits. We wrap the dynamic domino circuit in a wrapper that communicates using a request/acknowledge protocol and mediates the pre-charge/evaluate cycle of the dynamic logic. We apply standard bundled delay matching for completion detection but add an early completion feature that can signal completion if function validity can be determined from the output value. We call the resulting wrapper semi-bundled because of this early acknowledge. The circuit overhead required for this semi-bundled feature is relatively small, but can provide measurable speedup in some situations. The technique is suitable for any dynamic logic family that has a pre-charge/evaluate cycle, and that produces monotonic output transitions. |
Year | DOI | Venue |
|---|---|---|
2003 | 10.1145/764808.764874 | ACM Great Lakes Symposium on VLSI |
Keywords | Field | DocType |
semi-bundled feature,dynamic logic family,function validity,dynamic logic,simple hierarchical design technique,early completion feature,monotonic output transition,completion detection,dynamic domino circuit,self-timed system,output value,asynchronous circuit | Domino logic,Monotonic function,Computer science,Measure (mathematics),Real-time computing,Electronic engineering,Logic family,Dynamic logic (digital electronics),Electronic circuit,Asynchronous circuit,Speedup | Conference |
ISBN | Citations | PageRank |
1-58113-677-3 | 1 | 0.35 |
References | Authors | |
6 | 2 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Jung-Lin Yang | 1 | 7 | 2.46 |
| Erik Brunvand | 2 | 509 | 66.09 |