Name
Affiliation
Papers
ERIK BRUNVAND
UNIV UTAH,DEPT COMP SCI,SALT LAKE CITY,UT 84112
55
Collaborators
Citations 
PageRank 
70
509
66.09
Referers 
Referees 
References 
1119
1025
585
Search Limit
1001000
Title
Citations
PageRank
Year
Mach-RT: A Many Chip Architecture for High Performance Ray Tracing00.342022
Hardware-Accelerated Dual-Split Trees00.342020
GreenChip: A Tool for Evaluating Holistic Sustainability of Modern Computing Systems00.342019
Extending Student Labs with SMT Circuit Implementation00.342019
Mach-RT - A Many Chip Architecture for Ray Tracing.00.342019
Time Interval Ray Tracing for Motion Blur.00.342018
SimTRaX: Simulation Infrastructure for Exploring Thousands of Cores.10.352018
A detailed study of ray tracing performance: render time and energy cost.00.342018
Dark Silicon Considered Harmful: A Case for Truly Green Computing10.372018
Sustainable IC design and fabrication30.442017
Dual streaming for hardware-accelerated ray tracing30.372017
Power and energy implications of misunderstanding DRAM00.342017
Making Noise: Using Sound-Art to Explore Technological Fluency.20.512017
Holistically evaluating the environmental impacts in modern computing systems60.572016
Technological fluency through circuit bending00.342015
A noise-based curriculum for technological fluency00.342015
Using surface-mount components in an embedded systems lab.00.342015
Memory Considerations for Low Energy Ray Tracing60.452015
Why graphics programmers need to know about DRAM30.422014
An energy and bandwidth efficient ray tracing architecture170.712013
Arts/tech collaboration with embedded systems and kinetic art00.342013
Lights! speed! action!: fundamentals of physical computing for programmers10.402013
Drawing machines: exploring embedded system programming and hardware with an artistic flair (abstract only)00.342013
Fast, effective BVH updates for animated scenes180.782012
Games as motivation in computer design courses: I/O is the key20.442011
Kinetic art and embedded systems: a natural collaboration51.002011
Improving server performance on multi-cores via selective off-loading of OS functionality40.672010
Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, Providence, Rhode Island, USA, May 16-18 2010906.552010
Hardware prediction of OS run-length for fine-grained resource customization00.342010
TRaX: A Multicore Hardware Architecture for Real-Time Ray Tracing230.912009
OS execution on multi-cores: is out-sourcing worthwhile?80.742009
Fast ray tracing and the potential effects on graphics and gaming courses00.342008
TRaX: A Multi-Threaded Architecture for Real-Time Ray Tracing110.742008
Rethinking graphics and gaming courses because of fast ray tracing30.422007
Design of a cell library for asynchronous microengines00.342005
ARCS: an architectural level communication driven simulator00.342004
Using dynamic domino circuits in self-timed systems10.352003
Self-timed design with dynamic domino circuits30.642003
High-Level Asynchronous System Design Using the ACK Framework130.722000
Practical advances in asynchronous design and in asynchronous/synchronous interfaces70.941999
Impulse: Building a Smarter Memory Controller1267.781999
Memory System Support for Irregular Applications40.891998
ACT: A DFT Tool for Self-Timed Circuits00.341997
Fred: an architecture for a self-timed decoupled computer.110.881996
Self-timed design in GaAs—case study of a high-speed, parallel multiplier30.691996
Precise exception handling for a self-timed processor40.461995
Performance analysis and optimization of asynchronous circuits211.091994
Peephole optimization of asynchronous macromodule networks100.931994
Designing self-timed systems using concurrent programs30.431994
Guest editors' introduction to the special issue on asynchronous systems00.341993
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