Name
Abstract | ||
|---|---|---|
High-level synthesis of data paths with concurrent self-checking abilities is discussed to balance redundancy, latency, and checking effectiveness. The nominal and the checking computations are scheduled and allocated contemporaneously by using a force-directed approach to limit the number of redundant units required to achieve detection within the latency of the nominal computation only. Resource sharing between the nominal and the checking computation is used to minimise the redundancy, while keeping error aliasing as reduced as possible |
Year | DOI | Venue |
|---|---|---|
1998 | 10.1109/DFTVS.1998.732178 | DFT |
Keywords | Field | DocType |
force-directed approach,scheduling,redundant unit,latency,error detection,error aliasing,self-checking abilities,concurrent self-checking ability,nominal computation,concurrent error detection,application specific integrated circuits,checking computations,redundant units,integrated circuit design,redundancy,resource sharing,data paths,data path,high-level synthesis,high level synthesis,checking effectiveness,checking computation,fault tolerance,embedded system,resource management,concurrent computing | Latency (engineering),Computer science,Scheduling (computing),High-level synthesis,Error detection and correction,Real-time computing,Aliasing,Redundancy (engineering),Fault tolerance,Concurrent computing | Conference |
ISSN | ISBN | Citations |
1550-5774 | 0-8186-8832-7 | 20 |
PageRank | References | Authors |
1.72 | 10 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Anna Antola | 1 | 58 | 8.33 |
| Vincenzo Piuri | 2 | 859 | 100.65 |
| Mariagiovanna Sami | 3 | 314 | 39.98 |