Name
Abstract | ||
|---|---|---|
This paper presents a programmable FIR core with a compact adder-based computing engine and an automatic code generator. The FIR core saves 50% area of 'conventional MAC-based cores in the 0.13 mu m implementation. Besides, the complexity-aware code generator synthesizes optimized FIR programs for a user-defined sampling period. It explores an optimal scaling factor with common subexpression elimination automatically. In our simulations, the proposed approach reduces about 10%similar to 18% computing time of MAC-based FIR cores with comparable filtering performance. |
Year | DOI | Venue |
|---|---|---|
2006 | 10.1109/ISCAS.2006.1692945 | 2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGS |
Keywords | Field | DocType |
code generation,digital filters,fir filters,hydrogen,adders,computer architecture,digital signal processing,finite impulse response filter,computational complexity,engines,computational modeling,filtering,fir filter,common subexpression elimination,sampling methods,convolution | Digital signal processing,Common subexpression elimination,Digital filter,Adder,Computer science,Parallel computing,Sampling (signal processing),Filter (signal processing),Electronic engineering,Code generation,Computer hardware,Finite impulse response | Conference |
ISSN | Citations | PageRank |
0271-4302 | 0 | 0.34 |
References | Authors | |
2 | 5 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Yu-Ting Kuo | 1 | 60 | 9.60 |
| Tay-Jyi Lin | 2 | 139 | 24.36 |
| Yi Cho | 3 | 0 | 0.34 |
| Chih-Wei Liu | 4 | 158 | 27.02 |
| Chein-Wei Jen | 5 | 588 | 68.52 |