Abstract | ||
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Range reduction is a crucial step for accuracy in trigonometric functions evaluation. This paper shows and compares a set of algorithms for additive range reduction computation and their corresponding application-specific integrated circuit implementations (ensuring an accuracy of one unit in the last place). A word-serial architecture implementation has been used as a reference for clearer comparisons. Besides, a new tablebased pipelined architecture for range reduction has also been proposed. |
Year | DOI | Venue |
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2011 | 10.1109/TVLSI.2009.2033932 | IEEE Trans. VLSI Syst. |
Keywords | Field | DocType |
paper shows,corresponding application-specific integrated circuit,crucial step,additive range reduction computation,trigonometric functions evaluation,word-serial architecture implementation,range reduction,high-speed algorithm,clearer comparison,last place,new tablebased pipelined architecture,pipelines,algorithms,application specific integrated circuits,pipeline,computer architecture,function approximation,approximation algorithms,application specific integrated circuit,hardware,elementary functions,cost function,floating point arithmetic | Approximation algorithm,Trigonometric functions,Function approximation,Floating point,Computer science,Algorithm,Unit in the last place,Application-specific integrated circuit,Electronic engineering,Integrated circuit,Computation | Journal |
Volume | Issue | ISSN |
19 | 3 | 1063-8210 |
Citations | PageRank | References |
0 | 0.34 | 4 |
Authors | ||
5 |
Name | Order | Citations | PageRank |
---|---|---|---|
Francisco J. Jaime | 1 | 16 | 3.92 |
Miguel A. Sánchez | 2 | 37 | 6.02 |
Javier Hormigo | 3 | 113 | 19.45 |
Julio Villalba | 4 | 219 | 23.56 |
Emilio L. Zapata | 5 | 811 | 100.36 |