Name
Title | ||
|---|---|---|
An LRU-based replacement algorithm augmented with frequency of access in shared chip-multiprocessor caches |
Abstract | ||
|---|---|---|
This paper proposes a new replacement algorithm to protect cache lines with potential future reuse from being evicted. In contrast to the recency based approaches used in the past (LRU for example), our algorithm also uses the notion of frequency of access. Instead of evicting the least recently used block, our algorithm identifies among a set of LRU blocks the one that is also least-frequently-used (according to a heuristic) and chooses that as a victim. We have implemented this replacement algorithm in a detailed simulation model of a chip multiprocessor system driven by SPEC2000 benchmarks. We have found that the new scheme improves performance for memory intensive applications. Moreover, as compared to other attempts, our replacement algorithm provides robust improvements across all benchmarks. We have also extended an earlier scheme proposed by Wong and Baer so it is switched off when performance is not improved. Our results show that this makes the scheme much more suitable for CMP configurations. |
Year | DOI | Venue |
|---|---|---|
2007 | 10.1145/1327312.1327320 | ACM SIGARCH Computer Architecture News |
Keywords | DocType | Volume |
new replacement algorithm,lru-based replacement algorithm,cache line,replacement algorithm,memory intensive application,new scheme,earlier scheme,cmp configuration,spec2000 benchmarks,detailed simulation model,shared chip-multiprocessor cache,chip multiprocessor system,least recently used,least frequently used,simulation model | Journal | 35 |
Issue | Citations | PageRank |
4 | 8 | 0.50 |
References | Authors | |
13 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Haakon Dybdahl | 1 | 99 | 4.99 |
| Per Stenström | 2 | 3048 | 234.09 |
| Lasse Natvig | 3 | 109 | 19.61 |