Title
A Reconfigurable Multi-Transform VLSI Architecture Supporting Video Codec Design
Abstract
This brief presents a reconfigurable VLSI architecture which is designed for multi-transform codec in several video coding standards of MPEG-2/4, VC-1, H.264/AVC and AVS. The reconfigurable multiple constant multiplication algorithm with two fusing strategies is provided to generate constant multipliers in the matrix calculation blocks. Additionally, adder-sharing strategy is adopted in the unified preprocessing/postprocessing block to save circuit areas. The proposed architecture can support different standards through static reconfiguration and forward/inverse transform functions through dynamic reconfiguration. It is suitable for the real-time processing of 1080P HD video codec with six video standards transforms.
Year
DOI
Venue
2011
10.1109/TCSII.2011.2158265
IEEE Trans. on Circuits and Systems
Keywords
Field
DocType
adders,h.264/avc,1080p hd video codec,dynamic reconfiguration,forward transform functions,vc-1,six video standards transforms,preprocessing block,logic cad,fusing strategy,adder-sharing,constant multipliers,computer-aided design (cad),mpeg-2/4,avs,matrix algebra,multiplying circuits,reconfigurable architectures,multitransform codec,static reconfiguration,reconfigurable vlsi architecture,inverse transform functions,vlsi,video coding,inverse transforms,reconfigurable multiple constant multiplication algorithm,reconfigurable multiple constant multiplication (rmcm),reconfigurable multitransform vlsi architecture,adder-sharing strategy,multi-transform,matrix calculation blocks,real-time processing,video coding standards,video codec design,real-time systems,postprocessing block,video codecs,transform coding,indexing terms,discrete cosine transform,real time systems,computer architecture,computer aided design,very large scale integration,real time processing
1080p,Multiplication algorithm,Adder,Computer science,Transform coding,Electronic engineering,Coding (social sciences),Very-large-scale integration,Codec,Control reconfiguration
Journal
Volume
Issue
ISSN
58
7
1549-7747
Citations 
PageRank 
References 
16
1.82
9
Authors
6
Name
Order
Citations
PageRank
Kanwen Wang1304.52
Jialin Chen2162.16
Wei Cao3483.96
Ying Wang4789.39
Lingli Wang58625.42
Jiarong Tong66811.74