Jiarong Tong - Citegraph

Author Info

Name	Affiliation	Papers
JIARONG TONG	Fudan Univ, State Key Lab ASIC & Syst, Shanghai 200433, Peoples R China	24
Collaborators	Citations	PageRank
58	68	11.74
Referers	Referees	References
198	321	149

Search Limit

100321

Publications (24 rows)

Collaborators (58 rows)

Referers (100 rows)

Referees (100 rows)

Title	Citations	PageRank	Year
Indirect connection aware attraction for FPGA clustering (abstract only)	0	0.34	2013
Optimisation Of Fixed Polarity Canonical Or-Coincidence Expansions	2	0.59	2013
SPREAD: A Streaming-Based Partially Reconfigurable Architecture and Programming Model	13	0.74	2013
Yet Another Many-Objective Clustering (YAMO-Pack) for FPGA CAD	1	0.36	2013
A Novel Memristor-Based Rsram Structure For Multiple-Bit Upsets Immunity	2	0.42	2012
A partially reconfigurable architecture supporting hardware threads	8	0.69	2012
A coarse-grained reconfigurable computing unit	0	0.34	2011
A Reconfigurable Multi-Transform VLSI Architecture Supporting Video Codec Design	16	1.82	2011
Fault modeling and characteristics of SRAM-based FPGAs (abstract only)	1	0.35	2011
General switch box modeling and optimization for FPGA routing architectures	0	0.34	2010
Accelerating Boolean Matching Using Bloom Filter	1	0.35	2010
Building a faster boolean matcher using bloom filter	1	0.39	2010
Engineering a scalable Boolean matching based on EDA SaaS 2.0	0	0.34	2010
Variational capacitance modeling using orthogonal polynomial method	6	0.56	2008
Timing yield driven clock skew scheduling considering non-Gaussian distributions of critical path delays	8	0.51	2008
A novel dynamic reconfigurable VLSI architecture for H.264 transforms.	1	0.35	2008
A high-performance reconfigurable 2-D transform architecture for H.264.	5	0.50	2008
High-speed and memory-efficient architecture for 2-D 1-Level discrete wavelet transform	0	0.34	2008
WCOMP: Waveform Comparison Tool for Mixed-signal Validation Regression in Memory Design	2	0.71	2007
A New Universal Test Pattern Auto-generating Approach for FPGA Logic Resources (abstract only)	0	0.34	2005
Frequency Domain Wavelet Method With Gmres For Large-Scale Linear Circuit Simulation	0	0.34	2004
Two-sided projection method in variational equation model order reduction of nonlinear circuits	0	0.34	2004
A SC-based novel configurable analog cell	0	0.34	2003
FPART: A Multi-way FPGA Partitioning Procedure Based on the Improved FM Algorithm.	1	0.36	1998