Paper Info
Title
Compiler-Based Data Prefetching and Streaming Non-temporal Store Generation for the Intel(R) Xeon Phi(TM) Coprocessor
Abstract
The Intel(R) Xeon Phi(TM) coprocessor has software prefetching instructions to hide memory latencies and special store instructions to save bandwidth on streaming non-temporal store operations. In this work, we provide details on compiler-based generation of these instructions and evaluate their impact on the performance of the Intel(R) Xeon Phi(TM) coprocessor using a wide range of parallel applications with different characteristics. Our results show that the Intel(R) Composer XE 2013 compiler can make effective use of these mechanisms to achieve significant performance improvements.
Year
DOI
Venue
2013
10.1109/IPDPSW.2013.231
IPDPS Workshops
Keywords
Field
DocType
composer xe,memory latency,parallel application,compiler-based generation,xeon phi,streaming non-temporal store generation,special store instruction,different characteristic,significant performance improvement,non-temporal store operation,compiler-based data prefetching,effective use,intel xeon phi,vectors,parallel processing,performance,coprocessor,coprocessors,hardware,compiler,bandwidth
Xeon Phi,Computer science,Parallel processing,Parallel computing,Compiler,Bandwidth (signal processing),Software prefetching,Xeon,Instruction prefetch,Coprocessor,Operating system
Conference
Citations 
PageRank 
References 
22
1.31
13
Authors
6
Name
Order
Citations
PageRank
Rakesh Krishnaiyer117419.65
Emre Kultursay226511.46
Pankaj Chawla3221.31
Serguei Preis4281.86
Anatoly Zvezdin5221.31
Hideki Saito617714.88