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RAKESH KRISHNAIYER
Author Info
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Name
Affiliation
Papers
RAKESH KRISHNAIYER
Microcomput. Software Labs., Intel Corp., Santa Clara, CA, USA
12
Collaborators
Citations
PageRank
33
174
19.65
Referers
Referees
References
516
362
136
Search Limit
100
516
Publications (12 rows)
Collaborators (33 rows)
Referers (100 rows)
Referees (100 rows)
Title
Citations
PageRank
Year
Compiler-Based Data Prefetching and Streaming Non-temporal Store Generation for the Intel(R) Xeon Phi(TM) Coprocessor
22
1.31
2013
Can traditional programming bridge the ninja performance gap for parallel computing applications?
18
0.91
2012
Latency-tolerant software pipelining in a production compiler
1
0.34
2008
Impact of Compiler-based Data-Prefetching Techniques on SPEC OMP Application Performance
3
0.46
2005
Integrating high-level optimizations in a production compiler: design and implementation experience
3
0.42
2003
Value-Profile Guided Stride Prefetching for Irregular Code
7
0.55
2002
An Advanced Optimizer for the IA-64 Architecture
34
2.15
2000
A library-based approach to task parallelism in a data-parallel language
21
1.53
1997
HPF-MPI: A Programming System Supporting Task and Data Parallelism
0
0.34
1997
Remote I/O: fast access to distant storage
43
8.76
1997
Communicating data-parallel tasks: an MPI library for HPF.
0
0.34
1996
Double standards: bringing task parallelism to HPF via the message passing interface
22
2.53
1996
1