Title | ||
---|---|---|
Cross Layer Design to Multi-thread a Data-Pipelining Application on a Multi-processor on Chip |
Abstract | ||
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For some time now, configurable computing has been hailed as the future for application-specific architectures. The purported advantages are well-known: the increasing NRE cost of chip fab is avoided, the same platform can be used for a variety of applications, ... |
Year | DOI | Venue |
---|---|---|
2006 | 10.1109/ASAP.2006.24 | ASAP |
Keywords | Field | DocType |
application-specific architecture,data-pipelining application,nre cost,cross layer design,purported advantage,configurable computing,chip fab,chip,design optimization,solids,shared memory,computer architecture,application software,data analysis,process design,energy efficiency | System software,Pipeline (computing),Application layer,Yarn,Computer science,Efficient energy use,Parallel computing,Real-time computing,Thread (computing),Process design,Computer hardware,Application software | Conference |
ISSN | ISBN | Citations |
1063-6862 | 0-7695-2682-9 | 1 |
PageRank | References | Authors |
0.38 | 3 | 4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Bo-Cheng Charles Lai | 1 | 177 | 19.25 |
Patrick Schaumont | 2 | 1552 | 149.27 |
Wei Qin | 3 | 131 | 10.24 |
Ingrid Verbauwhede | 4 | 4650 | 404.57 |