Name
Title | ||
|---|---|---|
Libra: Tailoring SIMD Execution Using Heterogeneous Hardware and Dynamic Configurability |
Abstract | ||
|---|---|---|
Mobile computing as exemplified by the smart phone has become an integral part of our daily lives. The next generation of these devices will be driven by providing an even richer user experience and compelling capabilities: higher definition multimedia, 3D graphics, augmented reality, games, and voice interfaces. To address these goals, the core computing capabilities of the smart phone must be scaled. However, the energy budgets are increasing at a much lower rate, requiring fundamental improvements in computing efficiency. SIMD accelerators offer the combination of high performance and low energy consumption through low control and interconnect overhead. However, SIMD accelerators are not a panacea. Many applications lack sufficient vector parallelism to effectively utilize a large number of SIMD lanes. Further, the use of symmetric hardware lanes leads to low utilization and high static power dissipation as SIMD width is scaled. To address these inefficiencies, this paper focuses on breaking two traditional rules of SIMD processing: homogeneity and static configuration. The Libra accelerator increases SIMD utility by blurring the divide between vector and instruction parallelism to support efficient execution of a wider range of loops, and it increases hardware utilization through the use of heterogeneous hardware across the SIMD lanes. Experimental results show that the 32-lane Libra outperforms traditional SIMD accelerators by an average of 1.58x performance improvement due to higher loop coverage with 29% less energy consumption through heterogeneous hardware. |
Year | DOI | Venue |
|---|---|---|
2012 | 10.1109/MICRO.2012.17 | MICRO |
Keywords | Field | DocType |
simd processing,higher loop coverage,parallel processing,simd execution,libra accelerator,simd width,instruction parallelism,symmetric hardware lanes,static power dissipation,programmable accelerator,traditional simd accelerator,computing efficiency,hardware utilization,dynamic configurability,multimedia,simd accelerators,symmetric hardware lane,3d graphics,simd architecture,simd accelerator,tailoring simd execution,energy budgets,mobile games,augmented reality,tailoring,fundamental improvements,energy consumption,static configuration,program diagnostics,core computing capability,homogeneity,smart phones,vector parallelism,simd utility,heterogeneous hardware,voice interfaces,mobile computing,smart phone,simd lane,interconnect overhead,simd lanes | Mobile computing,User experience design,3D computer graphics,Computer science,SIMD,Augmented reality,Real-time computing,Computer hardware,Parallel computing,Interconnection,Energy consumption,Performance improvement,Embedded system | Conference |
ISSN | ISBN | Citations |
1072-4451 | 978-1-4673-4819-5 | 12 |
PageRank | References | Authors |
0.59 | 14 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Yongjun Park | 1 | 277 | 20.15 |
| Jason Jong Kyu Park | 2 | 90 | 4.68 |
| Hyunchul Park | 3 | 341 | 17.56 |
| Scott Mahlke | 4 | 4811 | 312.08 |