Name
Abstract | ||
|---|---|---|
The implementation of a Hough transform processor using a wafer-scale-integration technology, restructurable VLSI circuit is described. The Hough transform is typically used as a grouping operation in an image processing sequence. The transform discussed here groups pixels in order to extract linear features. This calculation is realized with a wafer-scale processor that allows a complete line extraction system to be integrated on a single PC board. Also discussed is the use of the CAD tools that allowed this processor to be realized without incurring silicon layout and processing overhead. |
Year | DOI | Venue |
|---|---|---|
1988 | 10.1109/34.3873 | IEEE Trans. Pattern Anal. Mach. Intell. |
Keywords | Field | DocType |
restructurable vlsi,complete line extraction system,cad tool,wafer-scale processor,monolithic hough transform processor,restructurable vlsi circuit,groups pixel,grouping operation,linear feature,incurring silicon layout,processing overhead,image processing sequence,feature extraction,pc board,very large scale integration,vlsi,pcb,switches,manufacturing,logic design,image processing,silicon,hough transform | Cad tools,Computer vision,Computer science,Image processing,Printed circuit board,Hough transform,Artificial intelligence,Pixel,Computer hardware,Very-large-scale integration | Journal |
Volume | Issue | ISSN |
10 | 1 | 0162-8828 |
Citations | PageRank | References |
22 | 3.73 | 2 |
Authors | ||
6 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| F. Matthew Rhodes | 1 | 22 | 3.73 |
| Joseph J. Dituri | 2 | 22 | 3.73 |
| Glenn H. Chapman | 3 | 167 | 34.10 |
| Bruce E. Emerson | 4 | 22 | 3.73 |
| Antonio M. Soares | 5 | 22 | 3.73 |
| Jack I. Raffel | 6 | 23 | 6.06 |