Title
Demonstration Of Speed Enhancements On An Industrial Circuit Through Application Of Non-Zero Clock Skew Scheduling
Abstract
A demonstration of the application of non-zero clock skew scheduling to enhance the speed characteristics of several functional unit blocks in a high performance processor is presented. It is shown that non-zero clock skew scheduling can improve circuit performance while relaxing the strict timing constraints of the critical data paths within a high speed system. A software tool implementing a non-zero clock skew scheduling algorithm is described together with a methodology that generates the required clock signal delays by replacing clock buffers from predesigned cell libraries. Timing margin improvements of up to 18% are achieved through the application of non-zero clock skew scheduling in certain functional blocks of an industrial high performance microprocessor.
Year
DOI
Venue
2001
10.1109/ICECS.2001.957650
ICECS 2001: 8TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS I-III, CONFERENCE PROCEEDINGS
Keywords
DocType
Citations 
functional unit,job shop scheduling,scheduling algorithm,clock skew,signal generators
Conference
3
PageRank 
References 
Authors
0.47
7
6
Name
Order
Citations
PageRank
Dimitrios Velenis111613.77
Kevin T. Tang222712.68
Ivan S. Kourtev3567.96
Victor Adler430.47
Franklin Baez515225.02
Eby G. Friedman62081248.81