Name
Abstract | ||
|---|---|---|
We propose a general methodology to speed up the test generation process for circuits with high-level primitives. Our search procedure is a variation of depth first search that tries to fully exploit the capabilities of a computer to execute complex arithmetic and logical operations. We present techniques for signal value justification, and fault propagation, which are used by our algorithm. We have implemented a dependency-directed backtracking method to speed up our algorithm. This methodology has been applied to six circuits and the results are found to be very encouraging. |
Year | DOI | Venue |
|---|---|---|
1990 | 10.1145/123186.123413 | DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference |
Keywords | Field | DocType |
fault propagation,logical operation,high-level primitive,complex arithmetic,signal value justification,test generation process,present technique,general methodology,search procedure,dependency-directed backtracking method,vlsi,depth first search,combinational circuits,digital circuits,combinational circuit,speed up,fault model | Automatic test pattern generation,Computer science,Electronic engineering,Combinational logic,Mixed-signal integrated circuit,Test compression,Backtracking,Very-large-scale integration,Fault model,Speedup | Conference |
ISBN | Citations | PageRank |
0-89791-363-9 | 18 | 3.01 |
References | Authors | |
10 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Ramachandra P. Kunda | 1 | 18 | 3.01 |
| J. Abraham | 2 | 4905 | 608.16 |
| Bharat Deep Rathi | 3 | 20 | 4.23 |
| Prakash Narain | 4 | 18 | 3.01 |