Title
Efficient global computations on a processor network with programmable logic
Abstract
A new parallel MIMD architecture is described each node of which is tightly coupled to a global programmable logic layer. This layer gives local acceleration to the node processors by massive micro-grain parallelism. It also provides fast computation services to distributed algorithms by synthesis of global dedicated units operating directly on node operands. As a result, fine approximations of global states become transparently visible in each node, in contrast with usual difficulties and delays in sharing and computing control data.
Year
DOI
Venue
1991
10.1007/BFb0035097
PARLE (1)
Keywords
Field
DocType
processor network,efficient global computation,programmable logic,distributed algorithm
Logic synthesis,Complex programmable logic device,Programmable Array Logic,Logic optimization,Computer science,Parallel computing,Programmable logic array,Simple programmable logic device,Systolic array,Programmable logic device
Conference
Volume
ISBN
Citations 
505
3-540-54151-9
7
PageRank 
References 
Authors
1.17
8
3
Name
Order
Citations
PageRank
Jean Marie Filloque171.17
Eric Gautrin2174.25
Bernard Pottier39119.77