Title | ||
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FSM-based transaction-level functional coverage for interface compliance verification |
Abstract | ||
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Interface compliance verification plays a very important role in modern SoC designs. In order to perform a quantitative analysis of simulation completeness, adequate coverage metrics are mandatory. In this paper, we propose a finite state machine (FSM) based transaction-level functional coverage methodology for interface compliance verification. A language, State-Oriented Language (SOL), is developed to specify functional transactions mainly at the higher FSM level instead of lower logic or signal level. By utilizing SOL, it is simple and rigorous to specify interesting transactions from the specification FSM of the target interface protocol. Experimental results show that the proposed methodology can effectively improve the verification quality as well as increase the efficiency of regression verification. |
Year | DOI | Venue |
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2006 | 10.1145/1118299.1118411 | ASP-DAC |
Keywords | Field | DocType |
interface compliance verification,adequate coverage metrics,proposed methodology,signal level,functional transaction,verification quality,specification fsm,higher fsm level,regression verification,fsm-based transaction-level functional coverage,target interface protocol,finite state machines,regression analysis,system on chip,finite state machine,mpeg4,formal verification,quantitative analysis,customization,video encoder | Functional verification,System on a chip,Intelligent verification,Computer science,Real-time computing,Finite-state machine,Verification,High-level verification,Database transaction,Formal verification | Conference |
ISSN | ISBN | Citations |
2153-6961 | 0-7803-9451-8 | 3 |
PageRank | References | Authors |
0.41 | 12 | 4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Man-Yun Su | 1 | 3 | 0.41 |
Che-Hua Shih | 2 | 39 | 3.73 |
Juinn-Dar Huang | 3 | 270 | 27.42 |
Jing-Yang Jou | 4 | 681 | 88.55 |