Name
Title | ||
|---|---|---|
Variability aware modeling of SoCs: From device variations to manufactured system yield |
Abstract | ||
|---|---|---|
As CMOS technology feature sizes decrease, random within-die and inter-die process variations more and more jeopardize SoC parametric and functional yield. Largely neglected in the state-of-the-art, dynamic energy consumption and power dissipation becomes heavily affected. This paper describes a technique to systematically bring statistically correlated timing/energy variations all the way up from the device to the SoC level. We propose a flow for variability aware modeling (VAM) and apply it to a case study using a industrial test vehicle. |
Year | DOI | Venue |
|---|---|---|
2009 | 10.1109/ISQED.2009.4810353 | ISQED |
Keywords | Field | DocType |
soc level,cmos integrated circuits,variability aware modeling,power dissipation,soc parametric,manufactured system yield,industrial test vehicle,device variation,dynamic energy consumption,correlated timing,system-on-chip,cmos technology feature size,case study,cmos technology,energy variation,functional yield,system on chip,testing,semiconductor device modeling,process variation,vehicle dynamics | System on a chip,Dissipation,Computer science,Flow (psychology),CMOS,Real-time computing,Electronic engineering,Parametric statistics,Dynamic energy | Conference |
ISBN | Citations | PageRank |
978-1-4244-2953-0 | 13 | 0.58 |
References | Authors | |
5 | 7 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| M. Miranda | 1 | 144 | 11.00 |
| B. Dierickx | 2 | 85 | 9.78 |
| P. Zuber | 3 | 13 | 0.58 |
| P. Dobrovoln | 4 | 13 | 0.58 |
| F. Kutscherauer | 5 | 13 | 0.58 |
| Philippe Roussel | 6 | 35 | 8.04 |
| P. Poliakov | 7 | 13 | 0.58 |