Name
Abstract | ||
|---|---|---|
This paper describes a low-power VLSI chip for speaker-independent 60-kWord continuous speech recognition based on a context-dependent Hidden Markov Model (HMM). It features a compression-decoding scheme to reduce the external memory bandwidth for Gaussian Mixture Model (GMM) computation and multi-path Viterbi transition units. We optimize the internal SRAM size using the max-approximation GMM calculation and adjusting the number of look-ahead frames. The test chip, fabricated in 40 nm CMOS technology, occupies 1.77 mm x 2.18 mm containing 2.52 M transistors for logic and 4.29 Mbit on-chip memory. The measured results show that our implementation achieves 34.2% required frequency reduction (83.3 MHz), 48.5% power consumption reduction (74.14 mW) for 60 k-Word real-time continuous speech recognition compared to the previous work while 30% of the area is saved with recognition accuracy of 90.9%. This chip can maximally process 2.4x faster than real-time at 200 MHz and 1.1 V with power consumption of 168 mW. By increasing the beam width, better recognition accuracy (91.45%) can be achieved. In that case, the power consumption for real-time processing is increased to 97.4 mW and the max-performance is decreased to 2.08x because of the increased computation workload. |
Year | DOI | Venue |
|---|---|---|
2013 | 10.1587/transele.E96.C.444 | IEICE TRANSACTIONS ON ELECTRONICS |
Keywords | DocType | Volume |
40 nm VLSI, hidden Markov model (HMM), large vocabulary continuous recognition (LVCSR) | Journal | E96C |
Issue | ISSN | Citations |
4 | 0916-8524 | 0 |
PageRank | References | Authors |
0.34 | 0 | 6 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Guangji He | 1 | 18 | 3.02 |
| Takanobu Sugahara | 2 | 5 | 1.58 |
| Yuki Miyamoto | 3 | 0 | 0.34 |
| Shintaro Izumi | 4 | 82 | 31.56 |
| Hiroshi Kawaguchi | 5 | 37 | 21.08 |
| masahiko yoshimoto | 6 | 117 | 34.06 |