Paper Info
Title
WCET-aware register allocation based on graph coloring
Abstract
Current compilers lack precise timing models guiding their built-in optimizations. Hence, compilers apply ad-hoc heuristics during optimization to improve code quality. One of the most important optimizations is register allocation. Many compilers heuristically decide when and where to spill a register to memory, without having a clear understanding of the impact of such spill code on a program's run time. This paper extends a graph coloring register allocator such that it uses precise worst-case execution time (WCET) models. Using this WCET timing data, the compiler tries to avoid spill code generation along the critical path defining a program's WCET. To the best of our knowledge, this paper is the first one to present a WCET-aware register allocator. Our results underline the effectiveness of the proposed techniques. For a total of 46 realistic benchmarks, we reduced WCETs by 31.2% on average. Additionally, the runtimes of our WCET-aware register allocator still remain acceptable.
Year
DOI
Venue
2009
10.1145/1629911.1630100
San Francisco, CA
Keywords
DocType
ISSN
register allocation,wcet-aware register allocator,wcet-aware register allocation,precise timing model,code quality,spill code,wcet timing data,built-in optimizations,register allocator,graph coloring,important optimizations,spill code generation,registers,memory allocation,code generation,real time systems,worst case execution time,optimization,optimizing compiler,software quality,embedded system,design optimization,resource management,critical path
Conference
0738-100X
ISBN
Citations 
PageRank 
978-1-6055-8497-3
16
0.73
References 
Authors
8
1
Name
Order
Citations
PageRank
Heiko Falk146231.54