Name
Abstract | ||
|---|---|---|
Multiple clock domains is one solution to the increasing problem of propagating the clock signal across increasingly larger and faster chips. The ability to independently scale frequency and voltage in each domain creates a powerful means of reducing power dissipation. |
Year | DOI | Venue |
|---|---|---|
2003 | 10.1109/MM.2003.1261388 | IEEE Micro |
Keywords | Field | DocType |
voltage scaling,multiple-clock-domain microprocessor,power dissipation,multiple clock domain,increasing problem,dynamic frequency,powerful mean,faster chip,clock signal,computer architecture,design methodology,frequency control,microarchitecture,chip,clock skew | Clock signal,Dynamic voltage scaling,Asynchronous communication,Computer science,Clock domain crossing,Parallel computing,Microprocessor,Real-time computing,Automatic frequency control,Clock skew,Synchronous circuit | Journal |
Volume | Issue | ISSN |
23 | 6 | 0272-1732 |
Citations | PageRank | References |
40 | 1.69 | 6 |
Authors | ||
6 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Grigorios Magklis | 1 | 702 | 45.64 |
| Greg Semeraro | 2 | 448 | 29.82 |
| Albonesi, David H. | 3 | 2091 | 165.88 |
| Steven G. Dropsho | 4 | 234 | 13.88 |
| Sandhya Dwarkadas | 5 | 3504 | 257.31 |
| Michael L. Scott | 6 | 2843 | 248.01 |