Name
Abstract | ||
|---|---|---|
Editor's note:In this protocol design and verification scheme, high-level models serve in generating simulation sequences for low-level models, and all simulation is based on directed testing. The methodology is versatile and flexible, but it might be difficult to set up the first time. --Carl Pixley, Synopsys |
Year | DOI | Venue |
|---|---|---|
2004 | 10.1109/MDT.2004.61 | IEEE Design & Test of Computers |
Keywords | Field | DocType |
protocol models,verification scheme,high-level model,simulation sequence,protocol design,low-level model,—carl pixley,synopsys,carl pixley,versatile testing methodology,formal specification,conformance testing,formal verification,protocols | Formal equivalence checking,Programming language,Computer science,Formal description,Formal specification,Conformance testing,Protocol design,Formal methods,Communications protocol,Formal verification | Journal |
Volume | Issue | ISSN |
21 | 5 | 0740-7475 |
Citations | PageRank | References |
2 | 0.41 | 0 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Maria Varsamou | 1 | 18 | 4.01 |
| Nikolaos Papandreou | 2 | 251 | 28.18 |
| Theodore Antonakopoulos | 3 | 434 | 53.04 |