Name
Abstract | ||
|---|---|---|
In this paper we explore the design of an asynchronous router for a time-division-multiplexed (TDM) network-on-chip (NOC) that is being developed for a multi-processor platform for hard real-time systems. TDM inherently requires a common time reference, and existing TDM-based NOC designs are either synchronous or mesochronous, but both approaches have their limitations: a globally synchronous NOC is no longer feasible in today's sub micron technologies and a mesochronous NOC requires special FIFO-based synchronizers in all input ports of all routers in order to accommodate for clock phase differences. This adds hardware complexity and increases area and power consumption. We propose to use asynchronous routers in order to achieve a simpler, more robust and globally-asynchronous NOC, and this represents an unexplored point in the design space. The paper presents a range of alternative router designs. All routers have been synthesized for a 65nm CMOS technology, and the paper reports post-layout figures for area, speed and energy and compares the asynchronous designs with an existing mesochronous clocked router. The results show that an asynchronous router is 2 times smaller, marginally slower and with roughly the same energy consumption, while offering a robust solution to the clock distribution problem. The paper further explores "clock-gating" of the individual pipeline stages in the asynchronous routers, and shows that this can lead to significant power savings. |
Year | DOI | Venue |
|---|---|---|
2013 | 10.1109/DSD.2013.40 | DSD |
Keywords | Field | DocType |
alternative router design,globally-asynchronous noc,asynchronous routers,asynchronous router,tdm-based noc design,asynchronous design,synchronous noc,mesochronous noc,router designs,clocked router,existing mesochronous,network routing,cmos integrated circuits,time division multiplexing,circuit complexity,integrated circuit design,network on chip,real time systems | Asynchronous communication,FIFO (computing and electronics),Asynchronous system,Computer science,Network on a chip,Real-time computing,Router,Time-division multiplexing,Energy consumption,Asynchronous circuit,Embedded system | Conference |
Citations | PageRank | References |
4 | 0.44 | 0 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Evangelia Kasapaki | 1 | 154 | 6.37 |
| Jens Sparsø | 2 | 453 | 52.97 |
| Rasmus Bo Sørensen | 3 | 59 | 5.51 |
| Kees G. W. Goossens | 4 | 2050 | 131.83 |