Name
Abstract | ||
|---|---|---|
Functional and formal verification are important methodologies for complex mixed-signal design validation. However the industry is still verifying such systems by pure simulation. This process lacks on error localization and formal verifications methods. This is the existing verification gap between the analog and digital blocks within a mixed-signal system. Our approach improves the verification process by creating temporal properties named mixed-signal assertions which are described by a combination of digital assertions and analog properties. The proposed method is a new assertion-based verification flow for designing mixed-signal circuits. The effectiveness of the approach is demonstrated on a Sigma/Delta-converter. |
Year | DOI | Venue |
|---|---|---|
2008 | 10.1093/ietfec/e91-a.12.3548 | IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES |
Keywords | Field | DocType |
assertions-based verification, mixed-signal simulation, simulation-based property checking, mixed-signal assertions, dynamic verification | Verification and validation of computer simulation models,Functional verification,Programming language,Intelligent verification,Computer science,Verification,Runtime verification,High-level verification,Software verification,Formal verification | Journal |
Volume | Issue | ISSN |
E91A | 12 | 1745-1337 |
Citations | PageRank | References |
2 | 0.48 | 3 |
Authors | ||
9 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Alexander Jesser | 1 | 15 | 2.15 |
| Stefan Laemmermann | 2 | 2 | 0.48 |
| Alexander Pacholik | 3 | 4 | 2.54 |
| Roland Weiss | 4 | 72 | 8.98 |
| Jürgen Ruf | 5 | 122 | 23.04 |
| Lars Hedrich | 6 | 267 | 31.08 |
| Wolfgang Fengler | 7 | 11 | 9.42 |
| Thomas Kropf | 8 | 326 | 59.09 |
| Wolfgang Rosenstiel | 9 | 1462 | 212.32 |