Using Robustness Testing to Handle Incomplete Verification Results When Combining Verification and Testing Techniques. | 0 | 0.34 | 2017 |
Efficient Testing of Different Loop Paths | 1 | 0.36 | 2015 |
Efficient Fault Localization During Replay of Embedded Software | 0 | 0.34 | 2015 |
Scalable and Optimized Hybrid Verification of Embedded Software | 2 | 0.38 | 2015 |
Erkennen von Speicherverletzungen im Testbetrieb von eingebetteter Software. | 0 | 0.34 | 2014 |
Increasing Software Reliability by Integrating Formal Verification and Robustness Testing. | 0 | 0.34 | 2014 |
LoCEG: Local Preprocessing in SAT-Solving through Counter-Example Generation. | 0 | 0.34 | 2014 |
More Flexible Object Invariants with Less Specification Overhead. | 1 | 0.38 | 2014 |
A Software Testing Framework to Integrate Formal Verification Results. | 0 | 0.34 | 2013 |
Beschleunigte Robustheitstests für verhaltensbeschreibende Zustandsmaschinen. | 0 | 0.34 | 2013 |
Optimized Static Parameter Assignment for Semiformal Software Verification. | 1 | 0.36 | 2012 |
DWARF-driven Equivalence Checking of UML Statecharts and Software Components. | 0 | 0.34 | 2011 |
Scalable and Extendable Hybrid Verification Platform. | 1 | 0.36 | 2011 |
State-based Analysis and UML-driven Equivalence Checking for C++ State Machines | 1 | 0.37 | 2010 |
Towards assertion-based verification of heterogeneous system designs | 9 | 0.74 | 2010 |
Semiformal verification of temporal properties in automotive hardware dependent software | 7 | 0.50 | 2009 |
Verification of temporal properties in automotive embedded software | 8 | 0.60 | 2008 |
Advanced Assertion-Based Design For Mixed-Signal Verification | 2 | 0.48 | 2008 |
Transaction Modeling and RTL Simulation Analysis. | 1 | 0.38 | 2007 |
Semiformal Verification of Temporal Properties in Embedded Software. | 1 | 0.40 | 2007 |
Grid Based Fast Falsification For Bounded Property Checking | 0 | 0.34 | 2007 |
UML/SysML-Systemanalyse zur Generierung von formalen Verifikationseigenschaften für verschiedene Abstraktionsebenen. | 0 | 0.34 | 2007 |
Automatische Eigenschaftsextraktion auf Systemebene aus SystemC Modellen. | 0 | 0.34 | 2006 |
Distributed Symbolic Bounded Property Checking | 1 | 0.37 | 2006 |
Fast falsification based on symbolic bounded property checking | 0 | 0.34 | 2006 |
Monitoring-based Formal Hardware Verification. | 0 | 0.34 | 2006 |
Overlap reduction in symbolic system traversal | 1 | 0.35 | 2005 |
Efficient and Customizable Integration of Temporal Properties | 0 | 0.34 | 2005 |
Transactional Level Verification and Coverage Metrics by Means of Symbolic Simulation. | 6 | 1.59 | 2004 |
Dynamic guiding of bounded property checking | 3 | 0.37 | 2004 |
Symbolic Verification and Analysis of Discrete Timed Systems | 2 | 0.57 | 2003 |
Using Symbolic Simulation for Bounded Property Checking | 0 | 0.34 | 2003 |
Optimized Temporal Logic Compilation | 3 | 0.50 | 2003 |
A visual approach to validating system level designs | 2 | 0.43 | 2002 |
Combination of Simulation and Formal Verification. | 0 | 0.34 | 2002 |
Data Analysis of Timed Finite State Systems. | 0 | 0.34 | 2001 |
Customer-Oriented Systems Design through Virtual Prototypes | 1 | 0.39 | 2001 |
Formale Verifikation diskreter Echtzeitsysteme (Formal Verification of Discrete Real-Time Systems) | 0 | 0.34 | 2001 |
Correctness of Efficient Real-Time Model Checking | 2 | 0.41 | 2001 |
RAVEN: Real-Time Analyzing and Verification Environment | 16 | 1.22 | 2001 |
A Toolset for the Symbolic Examination of Finite State Transition Systems. | 1 | 0.39 | 2000 |
Analyzing real-time systems | 5 | 0.80 | 2000 |
Do You Trust Your Model Checker? | 3 | 0.43 | 2000 |
Structured English for Model Checking Specification | 12 | 1.08 | 2000 |
Using MTBDDs for Compostion and Model Checking of Real-Time Systems | 7 | 0.60 | 1998 |
Symbolic model checking for a discrete clocked temporal logic with intervals | 21 | 1.78 | 1997 |
A New Algorithm for Discrete Timed Symbolic Model Checking | 1 | 0.36 | 1997 |