Name
Abstract | ||
|---|---|---|
In this communication, we propose a Miller compensation technique for low voltage LDO regulators which makes use of a current amplifier. The analysis shows how to design the compensation network when no voltage buffer is placed between the LDO error amplifier and power device and suggests a low supply voltage circuit topology that allows to compensate with a reasonably low integrated capacitance, to avoid oscillations due to the complex-conjugate poles at high output currents and to obtain acceptable under/overshoots during fast transient load variations. The designed LDO regulator can work with a supply voltage down to 1.2 V with a drop-out voltage of 200 mV at maximum load current of 100 mA; the integrated compensation capacitance is 25 pF, the load capacitor being equal to 1 muF. Simulations in good agreement with the theoretical results are also shown. |
Year | DOI | Venue |
|---|---|---|
2008 | 10.1109/ISCAS.2008.4542009 | ISCAS |
Keywords | Field | DocType |
complex-conjugate poles,miller compensation technique,amplifiers,load capacitor,network topology,transient load variations,low-voltage ldo compensation strategy,circuit topology,ldo regulator,ldo error amplifier,current amplifiers,frequency,low voltage,stability,capacitance,topology,oscillations,capacitors | Current-feedback operational amplifier,Capacitance,Capacitor,Computer science,Control theory,Voltage,Electronic engineering,Low voltage,Low-dropout regulator,Amplifier,Topology (electrical circuits) | Conference |
ISSN | ISBN | Citations |
0271-4302 | 978-1-4244-1684-4 | 2 |
PageRank | References | Authors |
0.53 | 7 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Gianluca Giustolisi | 1 | 50 | 14.17 |
| Gaetano Palumbo | 2 | 708 | 106.77 |
| Ester Spitale | 3 | 16 | 1.36 |