Name
Abstract | ||
|---|---|---|
An analytical framework for the implementation of digital infinite impulse response filters in fixed-point hardware on FPGAs is presented. It presumes that a continuous-time filter with the desired response is given. Within the framework, the constant coefficient bit widths are determined by accounting for the sensitivity of the filter's pole and zero locations with respect to the coefficient perturbations. The internal signal bit widths are determined by calculating theoretical bounds on the ranges of the signals, and on the errors introduced by truncation in the fixed-point hardware. The bounds form the basis for a methodology for the fixed-point digital implementation of a given continuous-time filter. The methodology avoids overflow, and guarantees a prescribed degree of accuracy in the filter output. The methodology is applied to a second-order filter used as a compensator in a magnetic bearing control system. |
Year | DOI | Venue |
|---|---|---|
2003 | 10.1145/611817.611863 | FPGA |
Keywords | Field | DocType |
second order,fft,matrix multiplicaiton,iir filter,infinite impulse response,control system,fixed point,fpga | Plant community,Computer science,Artificial intelligence,Machine learning | Conference |
ISBN | Citations | PageRank |
1-58113-651-X | 0 | 0.34 |
References | Authors | |
0 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Joan Carletta | 1 | 73 | 11.85 |
| R. J. Veillette | 2 | 46 | 8.40 |
| Frederick W. Krach | 3 | 0 | 0.34 |
| Zhengwei Fang | 4 | 26 | 2.72 |