Name
Abstract | ||
|---|---|---|
In today's many-core era, the interconnection networks have been the key factor that dominates the performance of a computer system. In this paper, we propose a design flow to discover the best topology in terms of the communication latency and physical constraints. First a set of representative candidate topologies are generated for the interconnection networks among computing chips; then an efficient multi-commodity flow algorithm is devised to evaluate the performance. The experiments show that the best topologies identified by our algorithm can achieve better average latency compared to the existing networks.
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Year | DOI | Venue |
|---|---|---|
2008 | 10.1109/ICCAD.2008.4681630 | ICCAD |
Keywords | Field | DocType |
average latency,design flow,supercomputer performance,computer system,interconnection network,many-core era,efficient multi-commodity flow algorithm,best topology,interconnection topology synthesis,communication latency,key factor,existing network,chip,benchmark testing,topology,network topology,logic design,simulation | Logic synthesis,Computer architecture,Supercomputer,Latency (engineering),Computer science,Network topology,Electronic engineering,Real-time computing,Design flow,Interconnection,Multiprocessor interconnection,Benchmark (computing) | Conference |
ISBN | Citations | PageRank |
978-1-4244-2820-5 | 1 | 0.41 |
References | Authors | |
9 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Yi Zhu | 1 | 296 | 59.12 |
| Michael Bedford Taylor | 2 | 1707 | 154.51 |
| Scott B. Baden | 3 | 519 | 67.52 |
| Chung-Kuan Cheng | 4 | 2314 | 285.85 |