Name
Abstract | ||
|---|---|---|
Memory access rate is a primary performance bottleneck in high-performance networking systems. The MoSys Bandwidth Engine family of integrated circuits provides a significant improvement in effective memory performance by using high-speed serial I/O's, many banks of memory, a low-latency, highly efficient protocol, and intelligence within the device. The first member of the family can perform 2 billion 72-bit reads per second or 1 billion read-modify-write operations per second. |
Year | DOI | Venue |
|---|---|---|
2013 | 10.1109/MM.2013.7 | Micro, IEEE |
Keywords | Field | DocType |
performance evaluation,protocols,random-access storage,MOSYS bandwidth engine family,high-performance networking systems,high-speed serial I-O,integrated circuits,intelligent RAM,many memory banks,memory access rate,memory performance,read-modify-write operations,integrated circuits,interfaces,memory technologies,multiple data stream architectures,semiconductor memories | Bottleneck,Interleaved memory,Synchronization,Computer science,Parallel computing,Real-time computing,Bandwidth (signal processing),Memory management,Computer hardware,Integrated circuit | Journal |
Volume | Issue | ISSN |
33 | 6 | 0272-1732 |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
11 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Bendik Kleveland | 1 | 26 | 3.91 |
| Michael John Miller | 2 | 2 | 0.73 |
| Ronald B. David | 3 | 7 | 1.94 |
| Jay Patel | 4 | 18 | 8.57 |
| Rajesh Chopra | 5 | 3 | 1.15 |
| Dipak K. Sikdar | 6 | 3 | 1.15 |
| Jeff Kumala | 7 | 1 | 0.76 |
| Socrates D. Vamvakos | 8 | 14 | 3.62 |
| Mike Morrison | 9 | 2 | 0.73 |
| Ming Liu | 10 | 3 | 1.15 |
| Jayaprakash Balachandran | 11 | 1 | 0.76 |