Title
Architecture for Multi-processor SoC Platform Using Dedicated Channels
Abstract
A multi-processor architecture for the platform based SoC design is proposed. Dedicated FIFOs are selected as channels between processors for designing of wireless communication system. The conditions to meet the latency and the throughput requirements are also proposed with generalized equations. To demonstrate the suggested equations, an 802.11a system is analyzed. They are confirmed by simulation of SystemC transaction level modeling.
Year
DOI
Venue
2005
10.1109/IWSOC.2005.43
IWSOC
Keywords
Field
DocType
dedicated fifos,multi-processor soc platform,throughput requirement,systemc transaction level modeling,dedicated channels,wireless communication system,multi-processor architecture,generalized equation,soc design,suggested equation,process design,frequency,hardware,design methodology,throughput,system on chip,integrated circuit design,wireless communication,processor architecture,computer architecture
Computer architecture,System on a chip,Wireless,Computer science,Transaction-level modeling,Communication channel,SystemC,Integrated circuit design,Process design,Throughput,Embedded system
Conference
ISBN
Citations 
PageRank 
0-7695-2403-6
0
0.34
References 
Authors
4
2
Name
Order
Citations
PageRank
Gyongsu Lee111.06
Sin-Chong Park28022.58