Name
Title | ||
|---|---|---|
Partially Protected Caches to Reduce Failures Due to Soft Errors in Multimedia Applications |
Abstract | ||
|---|---|---|
With advances in process technology, soft errors are becoming an increasingly critical design concern. Owing to their large area, high density, and low operating voltages, caches are worst hit by soft errors. Based on the observation that in multimedia applications, not all data require the same amount of protection from soft errors, we propose a partially protected cache (PPC) architecture, in which there are two caches, one protected and the other unprotected at the same level of memory hierarchy. We demonstrate that as compared to the existing unprotected cache architectures, PPC architectures can provide 47 times reduction in failure rate, at only 1% runtime and 3% power overheads. In addition, the failure rate reduction obtained by PPCs is very sensitive to the PPC cache configuration. Therefore, this observation provides an opportunity for further improvement of the solution by correctly parameterizing the PPC configurations. Consequently, we develop design space exploration (DSE) strategies to discover the best PPC configuration. Our DSE technique can reduce the exploration time by more than six times as compared to an exhaustive approach. |
Year | DOI | Venue |
|---|---|---|
2009 | 10.1109/TVLSI.2008.2002427 | IEEE Trans. VLSI Syst. |
Keywords | Field | DocType |
ppc cache configuration,ppc architecture,multimedia systems,ppc configuration,cache storage,critical design concern,quality of service,unequal data protection,design space exploration,failure rate,memory architecture,multimedia application,dse technique,partially protected cache (ppc),embedded systems,soft errors,multimedia embedded systems,exploration time,partially protected cache architecture,soft error,memory fault tolerance,existing unprotected cache architecture,power system protection,computer science,data protection,fault tolerant,low voltage,space exploration,embedded system | CPU cache,Computer science,Cache,Electronic engineering,Real-time computing,Memory architecture,Memory hierarchy,Soft error,Failure rate,Fault tolerance,Multimedia,Design space exploration,Embedded system | Journal |
Volume | Issue | ISSN |
17 | 9 | 1063-8210 |
Citations | PageRank | References |
9 | 0.54 | 12 |
Authors | ||
5 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Kyoungwoo Lee | 1 | 139 | 18.80 |
| Aviral Shrivastava | 2 | 812 | 68.67 |
| Ilya Issenin | 3 | 216 | 10.38 |
| Nikil Dutt | 4 | 4960 | 421.49 |
| Nalini Venkatasubramanian | 5 | 232 | 15.42 |