Title
Practical Formal Verification in Microprocessor Design
Abstract
Practical application of formal methods requires more than advanced technology and tools;it requires an appropriate methodology. A verification methodology for data-path-dominated hardware combines model checking and theorem proving in a customizable framework. This methodology has been effective in large-scale industrial trials, including verification of an IEEE-compliant floating-point adder.
Year
DOI
Venue
2001
10.1109/54.936245
IEEE Design & Test of Computers
Keywords
Field
DocType
data-path-dominated hardware,formal method,appropriate methodology,practical formal verification,model checking,large-scale industrial trial,microprocessor design,practical application,advanced technology,ieee-compliant floating-point adder,verification methodology,customizable framework,formal verification,floating point,logic design,theorem proving
Formal equivalence checking,Computer architecture,Functional verification,Software engineering,Intelligent verification,Computer science,Runtime verification,Verification,Formal methods,High-level verification,Computer engineering,Formal verification
Journal
Volume
Issue
ISSN
18
4
0740-7475
Citations 
PageRank 
References 
25
1.39
4
Authors
5
Name
Order
Citations
PageRank
Robert B. Jones143439.17
John W. O'Leary218726.29
Carl-Johan H. Seger375090.27
Mark D. Aagaard41198.91
Thomas F. Melham538435.63