Name
Affiliation
Papers
THOMAS F. MELHAM
University of Glasgow Department of Computing Science G12 8QQ UK
42
Collaborators
Citations 
PageRank 
60
384
35.63
Referers 
Referees 
References 
721
638
511
Search Limit
100721
Title
Citations
PageRank
Year
Active Learning of Abstract System Models from Traces using Model Checking00.342022
Deepsynth: Automata Synthesis For Automatic Task Segmentation In Deep Reinforcement Learning00.342021
Exposing previously undetectable faults in deep neural networks00.342021
End-to-End Formal Verification of a RISC-V Processor Extended with Capability Pointers00.342021
Generating Realistic Unrestricted Adversarial Inputs using Dual-Objective GAN Training.20.362019
Gollum: Modular and Greybox Exploit Generation for Heap Overflows in Interpreters30.382019
Effective Verification for Low-Level Software with Competing Interrupts.10.482018
Verification of tree-based hierarchical read-copy update in the Linux kernel30.362018
Lifting CDCL to Template-based Abstract Domains for Program Verification.00.342017
Unbounded Safety Verification For Hardware Using Software Analyzers10.422016
Equivalence Checking of a Floating-Point Unit Against a High-Level C Model.10.352016
Generating test case chains for reactive systems.30.402016
Equivalence Checking a Floating-point Unit against a High-level C Model (Extended Version).00.342016
Equivalence Checking Using Trace Partitioning10.352015
Effective verification of low-level software with nested interrupts80.522015
Hardware Verification Using Software Analyzers40.472015
On the Semantics of ReFLect as a Basis for a Reflective Theorem Prover.00.342013
Chaining Test Cases for Reactive System Testing (extended version).10.352013
Chaining Test Cases for Reactive System Testing.70.462013
Assume-guarantee validation for STE properties within an SVA environment10.372009
A Symbolic Execution Framework For Algorithm-Level Modelling00.342009
A refinement approach to design and verification of on-chip communication protocols60.542008
Automatic Abstraction in Symbolic Trajectory Evaluation80.672007
Tool Building Requirements for an API to First-Order Solvers40.522006
A reflective functional language for hardware design and theorem proving281.312006
An industrially effective environment for formal hardware verification461.932005
Theorem Proving in Higher Order Logics, 18th International Conference, TPHOLs 2005, Oxford, UK, August 22-25, 2005, Proceedings233.292005
The PROSPER toolkit40.652003
An AMBA-ARM7 Formal Verification Platform50.512003
Abstraction by Symbolic Indexing Transformations80.632002
PROSPER - An Investigation into Software Architecture for Embedded Proof Engines00.342002
Correct Hardware Design and Verification Methods, 11th IFIP WG 10.5 Advanced Research Working Conference, CHARME 2001, Livingston, Scotland, UK, September 4-7, 2001, Proceedings251.962001
Practical Formal Verification in Microprocessor Design251.392001
Formally Analyzed Dynamic Synthesis of Hardware70.612001
An analysis of errors in interactive proof attempts30.602000
The PROSPER Toolkit432.382000
A Methodology for Large-Scale Hardware Verification242.222000
Xs are for Trajectory Evaluation, Booleans are for Theorem Proving30.501999
Dynamic Specialisation of XC6200 FPGAs by Parial Evaluation221.511998
Interactive theorem proving: an empirical study of user activity90.941998
Higher Order Logic Theorem Proving and Its Applications, 7th International Workshop, Valletta, Malta, September 19-22, 1994, Proceedings303.511994
A mechanized theory of the &pi-calculus in Hol251.621994