Name
Abstract | ||
|---|---|---|
High-performance DRAMs are providing increasing memory access bandwidth to processors, which is leading to high power consumption and operating temperature in DRAM chips. In this paper, we propose a customized low-power technique for high-performance DRAM systems to improve DRAM page hit rate by buffering write operations that may incur page misses. This approach reduces DRAM system power consumption and temperature without any performance penalty. We combine the throughput-aware page-hit-aware write buffer (TAP) with low-power-state-based techniques for further power and temperature reduction, namely, TAP-low. Our experiments show that a system with TAP-low could reduce the total DRAM power consumption by up to 68.6% (19.9% on average). The steady-state temperature can be reduced by as much as 7.84 °C and 2.55°C on average across eight representative workloads. |
Year | DOI | Venue |
|---|---|---|
2010 | 10.1109/TVLSI.2009.2014842 | IEEE Trans. VLSI Syst. |
Keywords | Field | DocType |
power management,steady-state temperature,dram page hit rate,dram system power consumption,high-performance dram system,high-performance drams,temperature reduction,customized low-power technique,adaptive dram temperature,dram chip,high power consumption,total dram power consumption,temperature,dram,power,steady state,chip | Hit rate,Dram,Power management,Computer science,Parallel computing,Universal memory,Write buffer,Real-time computing,Bandwidth (signal processing),Computer hardware,Multi-core processor,CAS latency | Journal |
Volume | Issue | ISSN |
18 | 4 | 1063-8210 |
Citations | PageRank | References |
4 | 0.43 | 11 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Song Liu | 1 | 216 | 8.86 |
| Yu Zhang | 2 | 220 | 8.72 |
| Seda Öǧrenci Memik | 3 | 488 | 42.57 |
| Gokhan Memik | 4 | 1694 | 111.88 |