Abstract | ||
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The outstanding forward error correction provided by Turbo-Codes made them part of today's and emerging communications standards. Therefore, efficient Turbo-Decoder architectures are important building blocks in communications systems. In this paper we present a scalable, highly parallel architecture for UMTS compliant Turbo decoding and apply architecture-driven voltage scaling to reduce the energy consumption. We will show that this approach adds some additional, more energy-efficient solutions to the design space of low power Turbo decoding systems. It can save up to 34% of the decoding energy per datablock under realistic voltage assumptions. We present throughput, area, and energy results for various degrees of parallelization based on synthesis on a 0.18 μm ASIC-technology library, which is characterized for two different supply voltages: nominal 1.8 V and nominal 1.3 V. |
Year | Venue | Keywords |
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2003 | Journal of Embedded Computing - Low-power Embedded Systems | communications standard,low power turbo,architecture-driven voltage,energy consumption,present throughput,communications system,energy result,umts compliant turbo decoding,decoding energy,architecture-driven voltage scaling,different supply voltage,high-throughput turbo-decoders,channel coding,high throughput,turbo codes,mobile communication |
DocType | Volume | Issue |
Conference | 1 | 3 |
Citations | PageRank | References |
0 | 0.34 | 13 |
Authors | ||
3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Frank Gilbert | 1 | 55 | 5.88 |
Timo Vogt | 2 | 77 | 8.09 |
Norbert Wehn | 3 | 1165 | 137.17 |