Title
Performance optimization of synchronous control units for datapaths with variable delay arithmetic units
Abstract
Nowadays, variable delay arithmetic units have been used for implementing a datapath of a target system in pursuit of performance improvement. However, adoption of variable delay arithmetic units requires modification of a typical synchronous control unit design methodology. A telescopic arithmetic unit based methodology is one of representative methodologies to design synchronous control units for variable delay datapaths. In this paper, we propose two optimization methods for it. Proposed optimization techniques will be analyzed in order to show their performance improvement effects explicitly.
Year
DOI
Venue
2003
10.1145/1119772.1119952
ASP-DAC
Keywords
Field
DocType
performance improvement effect,performance improvement,representative methodology,variable delay datapaths,synchronous control unit,performance optimization,design methodology,proposed optimization technique,variable delay arithmetic unit,optimization method,telescopic arithmetic unit,finite state machines,standard cell,logic design
Logic synthesis,Synchronous control,Datapath,Computer science,Arithmetic,Arithmetic logic unit,Electronic engineering,Real-time computing,Finite-state machine,Design methods,Standard cell,Performance improvement
Conference
ISBN
Citations 
PageRank 
0-7803-7660-9
3
0.51
References 
Authors
5
6
Name
Order
Citations
PageRank
Euiseok Kim14610.09
Dongik Lee27714.46
Hiroshi Saito3216.61
Hiroshi Nakamura4499.36
Jeong-Gun Lee57218.27
Takashi Nanya620035.46