Name
Abstract | ||
|---|---|---|
The Scalable Communications Core (SCC) is a power- and area-efficient solution for physical layer (PHY) and lower MAC processing of concurrent multiple wireless protocols. Our architecture consists of coarse-grained, heterogeneous, programmable accelerators ... |
Year | DOI | Venue |
|---|---|---|
2007 | 10.1109/ISVLSI.2007.70 | ISVLSI |
Keywords | Field | DocType |
scalable architecture,lower mac processing,ethernet switches,physical layer,concurrent multiple wireless protocol,area-efficient solution,scalable communications core,programmable accelerator,silicon,low latency,scalability,throughput,high throughput,packet switching,local area networks,network on a chip,switches,network on chip | Network on a chip,Computer network,Ethernet,Local area network,Latency (engineering),Throughput,Engineering,Interconnection,LAN switching,Embedded system,Scalability | Conference |
ISSN | ISBN | Citations |
2159-3469 | 0-7695-2896-1 | 4 |
PageRank | References | Authors |
0.45 | 4 | 5 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Erico Bastos | 1 | 4 | 0.45 |
| Everton Carara | 2 | 52 | 4.05 |
| Daniel V. Pigatto | 3 | 4 | 0.79 |
| Ney Calazans | 4 | 697 | 43.13 |
| Fernando Moraes | 5 | 720 | 43.62 |