Name
Title | ||
|---|---|---|
A 16-Gb/s backplane transceiver with 12-tap current integrating DFE and dynamic adaptation of voltage offset and timing drifts in 45-nm SOI CMOS technology. |
Abstract | ||
|---|---|---|
This paper presents a 16-Gb/s 45-nm SOI CMOS transceiver for multi-standard backplane applications. The receiver uses a 12-tap DFE with circuit refinements for supporting higher data rates. Both the receiver and the transmitter use dynamic adaptation to combat parameter drift due to changing supply voltage and temperature. A 3-tap FFE is included in the source-series-terminated driver. The combina... |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1109/JSSC.2012.2196313 | IEEE Journal of Solid-State Circuits |
Keywords | DocType | Volume |
Decision feedback equalizers,Clocks,Timing,Transceivers,Calibration,Linearity,Computer architecture | Conference | 47 |
Issue | ISSN | Citations |
8 | 0018-9200 | 18 |
PageRank | References | Authors |
2.22 | 5 | 17 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Gautam R. Gangasani | 1 | 25 | 4.18 |
| Chun-Ming Hsu | 2 | 37 | 6.00 |
| John F. Bulzacchelli | 3 | 281 | 42.62 |
| Sergey V. Rylov | 4 | 159 | 19.94 |
| Troy J. Beukema | 5 | 287 | 69.47 |
| daniel freitas | 6 | 18 | 2.22 |
| william r kelly | 7 | 25 | 3.51 |
| michael j shannon | 8 | 18 | 2.22 |
| Jieming Qi | 9 | 18 | 2.56 |
| Hui H. Xu | 10 | 25 | 3.51 |
| Joseph Natonio | 11 | 18 | 2.22 |
| Todd M. Rasmus | 12 | 24 | 2.95 |
| Jong-Ru Guo | 13 | 31 | 8.20 |
| Michael Wielgos | 14 | 18 | 2.22 |
| Jon Garlett | 15 | 73 | 8.89 |
| michael a sorna | 16 | 41 | 7.98 |
| Mounir Meghelli | 17 | 78 | 14.76 |