Mounir Meghelli - Citegraph

Author Info

Name	Affiliation	Papers
MOUNIR MEGHELLI	IBM Systems and Technology Group, Hopewell Junction, NY, USA	19
Collaborators	Citations	PageRank
117	78	14.76
Referers	Referees	References
384	302	41

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100384

Publications (19 rows)

Collaborators (100 rows)

Referers (100 rows)

Referees (100 rows)

Title	Citations	PageRank	Year
Errata Erratum to "A 128-Gb/s 1.3-pJ/b PAM-4 Transmitter With Reconfigurable 3-Tap FFE in 14-nm CMOS".	0	0.34	2020
A 128-Gb/s 1.3-pJ/b PAM-4 Transmitter With Reconfigurable 3-Tap FFE in 14-nm CMOS	0	0.34	2020
A 60-Gb/s 1.9-pJ/bit NRZ Optical Receiver With Low-Latency Digital CDR in 14-nm CMOS FinFET.	1	0.41	2018
FEC-Free 60-Gb/s Silicon Photonic Link Using SiGe-Driver ICs Hybrid-Integrated with Photonics-Enabled CMOS	0	0.34	2018
A 32 Gb/s, 4.7 pJ/bit Optical Link With -11.7 dBm Sensitivity in 14-nm FinFET CMOS.	3	0.41	2018
Internet of the Body and Cognitive Hypervisor	0	0.34	2017
Introduction to the Special Issue on the 2017 IEEE International Solid-State Circuits Conference.	0	0.34	2017
A 64-Gb/s 1.4-pJ/b NRZ Optical Receiver Data-Path in 14-nm CMOS FinFET.	3	0.40	2017
A 1.8 pJ/bit 16×16Gb/s Source-Synchronous Parallel Interface in 32 nm SOI CMOS with Receiver Redundancy for Link Recalibration.	0	0.34	2016
A 25 Gb/s burst-mode receiver for low latency photonic switch networks	4	0.55	2015
A WDM 4×28Gbps integrated silicon photonic transmitter driven by 32nm CMOS driver ICs	0	0.34	2015
A WDM-Compatible 4 × 32-Gb/s CMOS-driven electro-absorption modulator array	1	0.48	2015
A 32 Gb/S Backplane Transceiver With On-Chip Ac-Coupling And Low Latency Cdr In 32 Nm Soi Cmos Technology	7	1.28	2014
A linearized voltage-controlled oscillator for dual-path phase-locked loops	1	0.37	2013
A 16-Gb/s backplane transceiver with 12-tap current integrating DFE and dynamic adaptation of voltage offset and timing drifts in 45-nm SOI CMOS technology.	18	2.22	2011
Introduction to the Special Section on the 2008 Compound Semiconductor Integrated Circuit Symposium (CSICS'08)	0	0.34	2008
A 10Gb/s 5-Tap-DFE/4-Tap-FFE Transceiver in 90nm CMOS	11	2.72	2006
A 10-Gb/S Two-Dimensional Eye-Opening Monitor In 0.13-Mu M Standard Cmos	26	2.56	2005
45-Gb/s SiGe BiCMOS PRBS generator and PRBS checker [pseudorandom bit sequence].	3	0.65	2003

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