Title
Non-linearity reduction technique for delay-locked delay-lines
Year
DOI
Venue
2001
10.1109/ISCAS.2001.922265
ISCAS (4)
Keywords
Field
DocType
capacitors,cmos technology,statistical test,time measurement,telecommunications,linearity
Delay calculation,Control theory,Nonlinear system,Control theory,Shunt capacitors,Computer science,Non linearity,Electronic engineering,CMOS,Cell delay,Statistical hypothesis testing
Conference
Citations 
PageRank 
References 
1
1.68
4
Authors
3
Name
Order
Citations
PageRank
Luca Fanucci153282.83
Roberto Roncella211127.03
Roberto Saletti38620.89