| Low Cost and Flexible Battery Framework for Micro-grid Applications. | 0 | 0.34 | 2020 |
| Preliminary Study of a Novel Lithium-Ion Low-Cost Battery Maintenance system. | 0 | 0.34 | 2020 |
| Design and Safety Verification of a Distributed Charge Equalizer for Modular Li-Ion Batteries. | 2 | 0.39 | 2014 |
| Reconfigurable FPGA architecture for computer vision applications in Smart Camera Networks | 2 | 0.37 | 2013 |
| High-Efficiency Digitally Controlled Charge Equalizer for Series-Connected Cells Based on Switching Converter and Super-Capacitor. | 15 | 1.24 | 2013 |
| Audio Telecom ADC Featuring Click-Free Gain Control Technique, Dithering Insertion, and Idle Tone Shifting. | 0 | 0.34 | 2012 |
| Design And Verification Of Hardware Building Blocks For High-Speed And Fault-Tolerant In-Vehicle Networks | 31 | 2.91 | 2011 |
| A New and Accurate System for Measuring Cruising Yacht Freeboards With Magnetostrictive Sensors | 4 | 0.91 | 2011 |
| Effective modeling of temperature effects on lithium polymer cells. | 2 | 0.73 | 2010 |
| Firmware/software platform for rapid development of PC-based data acquisition systems. | 0 | 0.34 | 2010 |
| Distributed sensor for steering wheel rip force measurement in driver fatigue detection | 0 | 0.34 | 2009 |
| Electronic Control of a Motorcycle Suspension for Preload Self-Adjustment | 8 | 0.81 | 2008 |
| Wireless Audio Communication Network for In-Vehicle Access of Infotainment Services in Motorcycles | 1 | 0.37 | 2006 |
| Single-photon avalanche diode arrays for fast transients and adaptive optics | 2 | 0.54 | 2006 |
| Self-adjusting multiple-period locked delay line For high-resolution multiphase clock generation. | 0 | 0.34 | 2005 |
| 60-channel high-resolution counter array for high-speed continuous long-term data acquisition. | 1 | 0.87 | 2005 |
| SEU Protected CPU for Slow Control on Space Vehicles | 1 | 0.43 | 2004 |
| A Switched Opamp-based 10-b Integrated ADC for Ultra Low-power Applications. | 0 | 0.34 | 2003 |
| Exhaustive test of several dependable memory architectures designed by GRAAL tool | 0 | 0.34 | 2003 |
| Designing and Testing High Dependable Memories for Aerospace Applications | 0 | 0.34 | 2003 |
| Designing Carry Look-Ahead Adders with an Adiabatic Logic Standard-Cell Library | 2 | 0.71 | 2002 |
| Non-linearity reduction technique for delay-locked delay-lines | 1 | 1.68 | 2001 |
| An efficient VLSI architecture for real-time additive synthesis of musical signals | 2 | 0.51 | 1999 |
| Multihit multichannel time-to-digital converter with /spl plusmn/1% differential nonlinearity and near optimal time resolution | 9 | 4.12 | 1998 |
| A pyramid vector quantizer chip for HDTV applications | 0 | 0.34 | 1997 |
| ASIC-based acoustic echo-canceller board for VME bus | 1 | 0.42 | 1992 |
| An example of a new VLSI design style based on systolic macrocells: A high-speed single-chip transversal filter for signal processing applications | 2 | 0.50 | 1990 |
