Paper Info
Title
Implementation of BEE: a real-time large-scale hardware emulation engine
Abstract
This paper describes the hardware implementation of a real-time, large-scale, multi-chip FPGA (Field Programmable Gate Array) based emulation engine with a capacity of 10 million ASIC (Application Specific Integrated Circuits) equivalent gates. Attainable system operation frequency can exceed 60 MHz, and the system throughput has been empirically verified to achieve 600 billion 16-bit additions per second. The emulator is custom designed to maximize the performance and resource utilization for a range of telecommunication and digital signal processing applications. With its high-speed interconnect architecture and large external I/O bandwidth, the emulator excels in prototyping real-time systems that have strict timing, logic capacity, and data rate requirements. Our development efforts are guided by such ongoing projects as ultra-wide band (UWB) and multi-channel-multi-antenna (MCMA) radio systems research.
Year
DOI
Venue
2003
10.1145/611817.611832
FPGA
Keywords
Field
DocType
system throughput,field programmable gate array,radio systems research,real-time large-scale hardware emulation,o bandwidth,hardware emulation,specific integrated circuits,billion 16-bit addition,logic capacity,fpga,rapid-prototyping,attainable system operation frequency,real-time system,emulator excels,resource utilization,real time,chip,ultra wide band,real time systems,digital signal processing,application specific integrated circuit
Rapid prototyping,Digital signal processing,Computer science,Parallel computing,Field-programmable gate array,Real-time computing,Application-specific integrated circuit,Bandwidth (signal processing),Emulation,Throughput,Hardware emulation,Embedded system
Conference
ISBN
Citations 
PageRank 
1-58113-651-X
11
3.38
References 
Authors
6
4
Name
Order
Citations
PageRank
Chen Chang117426.12
Kimmo Kuusilinna221627.10
Brian Richards314016.18
Robert W. Brodersen41857401.31