| Receiver Adaptive Beamforming And Interference Of Indoor Environments In Mmwave | 0 | 0.34 | 2018 |
| A 1 GS/s 6 Bit 6.7 mW Successive Approximation ADC Using Asynchronous Processing | 40 | 3.30 | 2010 |
| A 1-Gs/S 6-Bit 6.7-Mw Adc In 65-Nm Cmos | 6 | 0.92 | 2009 |
| File system access from reconfigurable FPGA hardware processes in BORPH. | 6 | 0.53 | 2008 |
| An integrated debugging environment for FPGA computing platforms | 5 | 0.75 | 2008 |
| ASIC Design and Verification in an FPGA Environment | 4 | 0.96 | 2007 |
| Impact of Sampling Jitter on Mostly-Digital Architectures for UWB Bio-Medical Applications | 1 | 0.50 | 2007 |
| A Highly Integrated 60GHz CMOS Front-End Receiver. | 19 | 4.24 | 2007 |
| A Subsampling Radio Architecture for Ultrawideband Communications | 9 | 0.62 | 2007 |
| Improving Usability of FPGA-Based Reconfigurable Computers Through Operating System Support. | 19 | 1.73 | 2006 |
| A 6-Bit 600-Ms/S 5.3-Mw Asynchronous Adc In 0.13-Mu M Cmos | 106 | 15.15 | 2006 |
| A unified hardware/software runtime environment for FPGA-based reconfigurable computers using BORPH | 51 | 2.86 | 2006 |
| Cooperative Sensing Among Cognitive Radios | 617 | 102.55 | 2006 |
| Novel radio architectures for UWB, 60 GHz, and cognitive wireless systems | 22 | 3.00 | 2006 |
| A 6b 600MS/s 5.3mW Asynchronous ADC in 0.13/spl mu/m CMOS | 2 | 0.44 | 2006 |
| Tomorrow's analog: just dead or just different? | 1 | 0.35 | 2006 |
| Digital Complex Signal Processing Techniques For Impulse Radio | 0 | 0.34 | 2006 |
| An integrated debugging environment for reprogrammble hardware systems | 6 | 0.63 | 2005 |
| BEE2: A High-End Reconfigurable Computing System | 128 | 11.32 | 2005 |
| A Subsampling Uwb Impulse Radio Architecture Utilizing Analytic Signaling | 5 | 1.66 | 2005 |
| Physical layer design issues unique to cognitive radio systems. | 64 | 17.56 | 2005 |
| The Design And Application Of A High-End Reconfigurable Computing System | 0 | 0.34 | 2005 |
| An Ultra-Wideband Transceiver Architecture for Low Power, Low Rate, Wireless Systems | 58 | 7.33 | 2005 |
| Methods for true energy-performance optimization | 89 | 6.79 | 2004 |
| FLOATING-POINT TO FIXED-POINT CONVERSION WITH DECISION ERRORS DUE TO QUANTIZATION | 12 | 1.31 | 2004 |
| Millimeter-Wave Cmos Device Modeling And Simulation | 3 | 0.51 | 2004 |
| Automated design of operational transconductance amplifiers using reversed geometric programming | 11 | 1.00 | 2004 |
| Automated fixed-point data-type optimization tool for signal processing and communication systems | 28 | 1.85 | 2004 |
| Describing MIMO designs for rapid prototyping in the BEE environment | 1 | 0.36 | 2004 |
| A Perturbation Theory On Statistical Quantization Effects In Fixed-Point Dsp With Non-Stationary Inputs | 17 | 1.33 | 2004 |
| Designing BEE: a hardware emulation engine for signal processing in low-power wireless applications | 6 | 2.97 | 2003 |
| Implementation of BEE: a real-time large-scale hardware emulation engine | 11 | 3.38 | 2003 |
| An Equation-Based Method For Phase Noise Analysis | 1 | 0.40 | 2003 |
| Synchronization Schemes For Packet Ofdm System | 13 | 1.59 | 2003 |
| Rapid Design and Analysis of Communication Systems Using the BEE Hardware Emulation Environment | 24 | 6.78 | 2003 |
| Methods for true power minimization | 45 | 5.75 | 2002 |
| A design environment for high-throughput low-power dedicated signal processing systems | 22 | 10.53 | 2002 |
| A design environment for high-throughput low-power dedicated signal processing systems | 22 | 10.53 | 2002 |
| A design environment for high-throughput low-power dedicated signal processing systems | 28 | 8.92 | 2002 |
| Design Issues For Dynamic Voltage Scaling | 62 | 8.39 | 2000 |
| Trade-offs of Performance and Single Chip Implementation of Indoor Wireless Multi- Access Receivers | 4 | 3.21 | 1999 |
| System-on-a-Chip VLSI - Is It Finally Really Here? | 1 | 0.63 | 1999 |
| InfoPad - past, present and future | 12 | 7.53 | 1999 |
| Globally Progressive Interactive Web Delivery | 6 | 1.52 | 1999 |
| Integrating power control, error correction coding, and scheduling for a CDMA downlink system | 15 | 1.82 | 1999 |
| The InfoPad Multimedia Terminal: A Portable Device for Wireless Information Access | 24 | 7.23 | 1998 |
| Invited Address: The InfoPad Project: Review and Lessons Learned | 0 | 0.34 | 1998 |
| Unified power control, error correction coding and scheduling for aCDMA downlink system. | 5 | 0.83 | 1997 |
| Processor design for portable systems | 97 | 22.62 | 1996 |
| VLSI in Mobile Communication | 0 | 0.34 | 1996 |
