Name
Title | ||
|---|---|---|
Increasing Microprocessor Performance with Tightly-Coupled Reconfigurable Logic Arrays |
Abstract | ||
|---|---|---|
. Conventional approaches to increase the performance of microprocessorsoften do not provide the performance boost one has hopedfor due to diminishing returns. We propose the extension of a conventionalhardwired microprocessor with a reconfigurable logic array, integratingboth conventional and reconfigurable logic on the same die.Simulations have shown that even a comparatively simple and compactextension allows performance gains of 2--4 times over conventional RISCprocessors of... |
Year | DOI | Venue |
|---|---|---|
1998 | 10.1007/BFb0055271 | FPL |
Keywords | Field | DocType |
tightly-coupled reconfigurable logic arrays,microprocessor performance | Computer science,CPU cache,Programmable logic array,Microprocessor,Field-programmable gate array,Reduced instruction set computing,Circuit architecture,Embedded system,Programmable logic device | Conference |
ISBN | Citations | PageRank |
3-540-64948-4 | 7 | 0.99 |
References | Authors | |
7 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Sergej Sawitzki | 1 | 15 | 4.79 |
| Achim Gratz | 2 | 8 | 2.10 |
| Rainer G. Spallek | 3 | 137 | 25.30 |