Paper Info
Title
A noise-immune sub-threshold circuit design based on selective use of Schmitt-trigger logic
Abstract
Nanoscale circuits operating at sub-threshold voltages are affected by growing impact of random telegraph signal (RTS) and thermal noise. Given the low operational voltages and subsequently lower noise margins, these noise phenomena are capable of changing the value of some of the nodes in the circuit, compromising the reliability of the computation. We propose a method for improving noise-tolerance by selectively applying feed-forward reinforcement to circuits based on use of existing invariant relationships. As reinforcement mechanism, we used a modification of the standard CMOS gates based on the Schmitt trigger circuit. SPICE simulations show our solution offers better noise immunity than both standard CMOS and fully reinforced circuits, with limited area and power overhead.
Year
DOI
Venue
2012
10.1145/2206781.2206792
ACM Great Lakes Symposium on VLSI
Keywords
Field
DocType
lower noise margin,nanoscale circuit,thermal noise,schmitt-trigger logic,noise-immune sub-threshold circuit design,selective use,standard cmos gate,standard cmos,schmitt trigger circuit,noise phenomenon,reinforcement mechanism,feed-forward reinforcement,better noise immunity,feed forward,threshold voltage,schmitt trigger,circuit design
Spice,Schmitt trigger,Computer science,Voltage,Noise (electronics),Circuit design,CMOS,Electronic engineering,Effective input noise temperature,Electronic circuit,Electrical engineering
Conference
Citations 
PageRank 
References 
4
0.54
9
Authors
7
Name
Order
Citations
PageRank
Marco Donato1315.83
Fabio Cremona240.54
Warren Jin381.28
R. Iris Bahar487884.31
W. R. Patterson512614.69
Alexander Zaslavsky6132.94
J. L. Mundy71352280.31