Name
Abstract | ||
|---|---|---|
Traditional alias analysis is expensive and ineffective for dynamic optimizations. In practice, dynamic optimization systems perform memory optimizations speculatively, and rely on hardware, such as alias registers, to detect memory aliases at runtime. Existing hardware alias detection schemes either cannot scale up to a large number of alias registers or may introduce false positives. Order-based alias detection overcomes the limitations. However, it brings considerable challenges as how software can efficiently manage the alias register queue and impose restrictions on optimizations. In this paper, we present SMARQ, a Software-Managed Alias Register Queue, which manages the alias register queue efficiently and supports more aggressive speculative optimizations. We conducted experiments with a dynamic optimization system on a VLIW processor that has 64 alias registers. The experiments on a suite of SPECFP2000 benchmarks show that SMARQ improves the overall performance by 39% as compared to the case without hardware alias detection. By scaling up to a large number (from 16 to 64) of alias registers, SMARQ improves performance by 10%. Compared to a technique with false positives (similar to Itanium), SMARQ improves performance by 13%. To reduce the chance of alias register overflow, the novel alias register allocation algorithm in SMARQ reduces the alias register working set by 74% as compared to a straightforward alias register allocation based on program order. |
Year | DOI | Venue |
|---|---|---|
2012 | 10.1109/MICRO.2012.46 | MICRO |
Keywords | Field | DocType |
order-based alias detection,memory alias,straightforward alias,speculative optimization,specfp2000 benchmarks,alias register queue,dynamic optimization systems,performance improvement,program order,queueing theory,dynamic optimizations,alias register queue management,dynamic optimization,multiprocessing systems,traditional alias analysis,smarq,alias register overflow,dynamic optimization system,performance evaluation,optimising compilers,alias register allocation algorithm,dynamic programming,speculation,software-managed alias register queue,vliw processor,novel alias,alias register,electronic engineering computing,hardware alias detection | Alias,Working set,Register allocation,Computer science,Very long instruction word,Queue,Parallel computing,Itanium,Real-time computing,Software,Alias analysis | Conference |
ISSN | ISBN | Citations |
1072-4451 | 978-1-4673-4819-5 | 2 |
PageRank | References | Authors |
0.38 | 15 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Cheng Wang | 1 | 356 | 20.10 |
| Youfeng Wu | 2 | 749 | 52.16 |
| Hongbo Rong | 3 | 91 | 6.22 |
| Hyunchul Park | 4 | 341 | 17.56 |