Abstract | ||
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Address transformation schemes, such as skewing and linear transformations, have been proposed to achieve conflict-free access to one family of strides in vector processors with matched memories. In this paper, we extend these schemes to achieve this conflict-free access for several families. The ba- sic idea is to perform an out-of-order access to vectors of fixed length, equal to that of the vector reg- isters of the processor. The hardware required is similar to that for the access in order. |
Year | DOI | Venue |
---|---|---|
1991 | 10.1142/S0129626491000045 | Parallel Processing Letters |
Keywords | Field | DocType |
conflict-free access,storage schemes,out-of-order access,vector access.,parallel memory architecturess,temporal distribution,vector processor,out of order,linear transformation | Computer science,Parallel computing,Theoretical computer science,Linear map | Journal |
Volume | Citations | PageRank |
1 | 2 | 0.38 |
References | Authors | |
10 | 6 |
Name | Order | Citations | PageRank |
---|---|---|---|
Mateo Valero | 1 | 4520 | 355.94 |
Tomás Lang | 2 | 417 | 73.70 |
José María Llabería | 3 | 93 | 10.65 |
Montse Peiron | 4 | 82 | 10.76 |
Juan J. Navarro | 5 | 323 | 42.90 |
Eduard Ayguadé | 6 | 2406 | 216.00 |