Name
Abstract | ||
|---|---|---|
This paper proposes a methodology for testing RAM-based FPGA taking into account the configurability of such flexible devices. Two different approaches with different objectives are identified: the Manufacturing Test Procedure and the User Test Procedure. The proposed method is used to generate a Manufacturing Test Procedure targeting the Interconnect Structure of RAM-based FPGA. It is demonstrated that a set of only 3 Test Configurations called the Orthogonal, the Diagonal-1 and Diagonal-2 Test Configurations suffice to make 100% of the considered realistic fault set non-redundant. Then the test of each configuration is shown equivalent to the test of classical buses. The final proposed Manufacturing Test Procedure present a constant number of Test Configurations (3) and very short Test Sequences. |
Year | DOI | Venue |
|---|---|---|
1997 | 10.1109/VTEST.1997.600278 | VTS |
Keywords | Field | DocType |
different objective,test configurations,final proposed manufacturing test,diagonal-2 test configurations,ram-based fpga,different approach,manufacturing test procedure,short test sequences,user test procedure,interconnect,field programmable gate arrays | Automatic test pattern generation,Logic testing,Automatic test equipment,Computer science,Field-programmable gate array,Electronic engineering,Interconnection,Test procedures,Embedded system | Conference |
ISSN | ISBN | Citations |
1093-0167 | 0-8186-7810-0 | 71 |
PageRank | References | Authors |
6.18 | 15 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| M. Renovell | 1 | 224 | 18.93 |
| J. Figueras | 2 | 227 | 19.91 |
| Y. Zorian | 3 | 499 | 47.97 |