Title
Implementation of the W-CDMA cell search on a MPSOC designed for software defined radios
Abstract
This paper describes the implementation of theW-CDMA cell search algorithm on a homogeneous general purpose multi-processor system-on-chip architecture. The architecture is composed of nine nodes based on COFFEE RISC cores communicating using hierarchical network-on-chip. The work focuses on the parallelization of the cell search algorithm, enabling execution on different processing nodes, and exploiting the capabilities of the network-on-chip. We achieved a total speed-up of 7.3 X when compared with a single processing core system, taking into account the overhead related with the communication between different nodes. The result is significant since very close to the theoretical maximum of 9 X. Considering the hardware implementation, the target cell search is performed in 104 ms on an FPGA with 75 MHz maximum frequency, and in 40 ms on an ASIC circuit with 200 MHz maximum frequency.
Year
DOI
Venue
2009
10.1109/SIPS.2009.5336244
2009 IEEE Workshop on Signal Processing Systems
Keywords
Field
DocType
W-CDMA,MPSOC,multi-processor system-on-chip architecture,software defined radios,hierarchical network-on-chip,target cell search,ASIC circuit,time 104 ms,time 40 ms
Synchronization,System on a chip,Software-defined radio,Computer science,Parallel computing,Field-programmable gate array,Real-time computing,Application-specific integrated circuit,Code division multiple access,MPSoC,Embedded system,Spread spectrum
Conference
ISSN
Citations 
PageRank 
2162-3562
3
0.45
References 
Authors
5
5
Name
Order
Citations
PageRank
Fabio Garzia116416.95
Roberto Airoldi2598.10
Tapani Ahonen317214.84
Jari Nurmi455683.87
Dragomir Milojevic511112.25