Title
Empirical model for cooperative resizing of processor structures to exploit power-performance efficiency at runtime.
Abstract
Power consumption has become a major cause of concern spanning from data centres to handheld devices. Traditionally, improvement in power-performance efficiency of a modern superscalar processor came from technology scaling. However, that is no longer the case. Many of the current systems deploy coarse grain voltage and/or frequency scaling for power management. These techniques are attractive, bu...
Year
DOI
Venue
2012
10.1049/iet-cds.2011.0354
IET Circuits, Devices & Systems
Keywords
Field
DocType
CMOS integrated circuits,computer centres,integrated circuit modelling,nanoelectronics,regression analysis
Power management,Resizing,Queue,CMOS,Electronic engineering,Exploit,Mobile device,Frequency scaling,Granularity,Mathematics
Journal
Volume
Issue
ISSN
6
5
1751-858X
Citations 
PageRank 
References 
0
0.34
10
Authors
2
Name
Order
Citations
PageRank
Omer Khan11156.87
Sandip Kundu21103137.18